Freescale Semiconductor /MKL46Z4 /SIM /COPC

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as COPC

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)COPW 0 (0)COPCLKS 0 (00)COPT

COPT=00, COPCLKS=0, COPW=0

Description

COP Control Register

Fields

COPW

COP Windowed Mode

0 (0): Normal mode

1 (1): Windowed mode

COPCLKS

COP Clock Select

0 (0): Internal 1 kHz clock is source to COP.

1 (1): Bus clock is source to COP.

COPT

COP Watchdog Timeout

0 (00): COP disabled

1 (01): COP timeout after 25 LPO cycles or 213 bus clock cycles

2 (10): COP timeout after 28 LPO cycles or 216 bus clock cycles

3 (11): COP timeout after 210 LPO cycles or 218 bus clock cycles

Links

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